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o < E � d NumSysWorkLoops DalEnv TargetCfg GlbCtxtHWMutexNumber eic_crash_enable eic_crash_type eic_crash_delay dog_hal_disable dog_hal_clk_freq_in_hz dog_hal_grace_timer_timeout image_id NUMBER_OF_DIRECT_CONNECT_INTERRUPTS GPIOINT_PHYSICAL_ADDRESS PROCESSOR SUMMARY_INTR_ID DIRECT_CONNECT_CONFIG_MAP INTERRUPT_PLATFORM XO_SHUTDOWN_RSRC INTERRUPT_CONFIG_DATA BaseMap IsRemotable DEFAULT_FREQUENCY QTIMER_BASE QTIMER_OFFSET QTIMER_FRAME QTIMER_AC_OFFSET QTIMER_INTVECTNUM IsAonTimer PMM_BASE PMM_INTVECTNUM blsp_spi_mosi[1] blsp_spi_miso[1] blsp_spi_clk[1] blsp_uart_tx[8] blsp_uart_rx[8] blsp_i2c_sda[8] blsp_i2c_scl[8] lcd0_reset_n nfc_irq mdp_vsync_p ethernet_int nfc_disable cam_mclk0 cam_mclk1 cam_mclk2 webcam2_reset_n cci_i2c_sda0 cci_i2c_scl0 cci_i2c_sda1 cci_i2c_scl1 cci_timer0 cci_timer1 webcam1_reset_n blsp1_spi_cs2a_n webcam1_standby blsp_i2c_sda[6] blsp_i2c_scl[6] cam1_standby_n cam1_rst_n hdmi_cec hdmi_ddc_clock hdmi_ddc_data hdmi_hot_plug_detect pci_e0_rst_n pci_e0_clkreqn pci_e0_wake fm_rds_int_n fm_rst_n sd_write_protect blsp_uart_tx[2] blsp_uart_rx[2] blsp_uart_cts_n[2] blsp_uart_rfr_n[2] blsp_uart_tx[3] blsp_uart_rx[3] blsp_uart_cts_n[3] blsp_uart_rfr_n[3] uim3_data uim3_clk uim3_reset uim3_present codec_int2 codec_int1 blsp_i2c_sda[7] blsp_i2c_scl[7] forced_usb_boot uim4_data uim4_clk uim4_reset uim4_present cam2_standby_n cam2_rst_n codec_rst_n pcm_clk pcm_sync pcm_din pcm_dout audio_ref_clk lpass_slimbus_clk lpass_slimbus_data0 lpass_slimbus_data1 btfm_slimbus_data btfm_slimbus_clk ter_mi2s_sck ter_mi2s_ws ter_mi2s_data0 fm_status_gpio ethernet_rst mems_reset_n blsp_spi_mosi[5] blsp_spi_miso[5] blsp_spi_cs_n[5] blsp_spi_clk[5] blsp_spi_mosi[12] blsp_i2c_sda[12] blsp_i2c_scl[12] ts_reset_n blsp1_spi_cs1_n rcm_trigger1 rcm_trigger2 rcm_trigger3 wigg_en sd_card_det_n grfc[0] grfc[1] grfc[2] grfc[3] grfc[4] grfc[5] grfc[6] grfc[7] uim2_data uim2_clk uim2_reset uim2_present uim1_data uim1_clk uim1_reset uim1_present uim_batt_alarm grfc[8] grfc[9] grfc[10] ssc_irq_0 ssc_irq_1 ssc_irq_2 ssc_irq_3 ssc_irq_4 ssc_irq_5 ssc_irq_7 ssc_irq_8 grfc[11] grfc[12] grfc[13] pci_e1_rst_n pci_e1_clkreqn pci_e1_wake grfc[14] gsm_tx_phase_d0 gsm_tx_phase_d1 grfc[15] rffe3_data rffe3_clk rffe4_data rffe4_clk rffe5_data rffe5_clk gps_tx_aggressor mss_lte_coxm_txd mss_lte_coxm_rxd rffe2_data rffe2_clk rffe1_data rffe1_clk tlmm_total_gpio tlmm_base tlmm_offset tlmm_ports TLMMDefaultPlatformGroup TlmmPlatformGroups ChipIdOverride HWREVNUM_PHYS_ADDR HWREVNUM_OFFSET PARTNUM_BMSK PARTNUM_SHFT VERSION_ID_BMSK VERSION_ID_SHFT QUALCOMM_MFG_ID_BMSK QUALCOMM_MFG_ID_SHFT SOC_HW_VERSION_PHYS_ADDR SOC_HW_VERSION_OFFSET MAJOR_VERSION_BMSK MAJOR_VERSION_SHFT MINOR_VERSION_BMSK MINOR_VERSION_SHFT FAMILY_NUMBER_BMSK FAMILY_NUMBER_SHFT DEVICE_NUMBER_BMSK DEVICE_NUMBER_SHFT ABT_Propdata NOCError_Propdata tcsr_base_name tcsr_base mutex_offsets wonce_offsets pmic_arb_base_addr owner interrupt smp2p_intr_enabled diag_f3_trace_control diag_f3_trace_detail f3trace_devcfg_version SourceProc IPCINT_PHYSICAL_ADDRESS IPCINT_OFFSET VCSLogDefaults VCSBSPConfig VCSStubConfig XML_READ MinCorner MaxCorner NominalMinUV NominalMaxUV EnableDVS EnableCPR /xo/cxo CORE_TOP_CSR � P@ ���� P ` p � � � � � � � � � � ! � � �6 � G � V �Z � �f � v � � � �( � �� � � �� � � � � � � �� � #� 6� � �G� � �]� e� � �q� �$�� �� � �� �� � �� e� �� � �q� �$�� �� 0� �� �� � �� �� � �q� � �� ��� �� � ��� � � "� 2� B� R� b�
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